1. Field of the Invention
This invention relates to a semiconductor memory device (EEPROM) with electrically rewritable and non-volatile semiconductor memory cells.
2. Description of Related Art
A NAND-type flash memory is known as one of EEPROM flash memories, which has a feature that a large memory capacitance may be easily achieved because the unit cell area is small. The NAND-type flash memory usually has a page buffer for reading and writing data by a page, so that it is possible to do high rate read and write.
In general, to make a flash memory have a large capacitance, and to make it possible, if necessary, to execute data reading simultaneously with data writing, plural memory planes (i.e., memory cores) are disposed as independent of each other in the memory chip. Word lines and bit lines in one memory plane are not continued to those in the remaining memory plane(s). Therefore, there is provided a decode circuit for each memory plane for selecting row and column therein (refer to, for example, Unexamined Japanese Patent Application Publication No. 2001-325795).
A sense amplifier circuit for detecting bit line data of a flash memory is usually disposed at one side of the memory cell array in the direction of bit lines thereof. Therefore, as the cell array capacitance becomes larger, the bit line capacitance (i.e., sense amplifier load) becomes larger, and this leads to deterioration of high-speed performance of the memory.